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         Pipelining Computer Science:     more books (15)
  1. A Code Mapping Scheme for Dataflow Software Pipelining (The Springer International Series in Engineering and Computer Science) by Guang R. Gao, 1990-12-31
  2. Wave Pipelining: Theory and CMOS Implementation (The Springer International Series in Engineering and Computer Science) by C. Thomas Gray, Wentai Liu, et all 1993-11-30
  3. Compiling for dataflow software pipelining (Technical report / McGill University. School of Computer Science) by Guang R Gao, 1989
  4. University of California, Irvine. Dept. of Information and Computer Science. Technical report by Frederic M Tonge, 1978
  5. Specification and verification of pipelining in the ARM2 RISC microprocessor (Technical report / University of Michigan, Computer Science and Engineering ... Electrical Engineering and Computer Science) by James K Huggins, 1998
  6. Perfect pipelining: A new loop parallelization technique (Technical report. Cornell University. Dept. of Computer Science) by Alexander Aiken, 1987
  7. Pipelining techniques for vector reduction arithmetic (Technical report) by Lionel M Ni, 1983
  8. Computer Organization by Carl Hamacher, Zvonko Vranesic, et all 2001-08-02
  9. Fault-tolerance and two-level pipelining in VLSI systolic arrays by H. T Kung, 1983
  10. A study of instruction prefetching and pipelining of 8088/286/386 microprocessors (DISCS publication) by K. T Lua, 1988
  11. The force on the flex global parallelism and portability (SuDoc NAS 1.26:178161) by Harry F. Jordan, 1986
  12. Complexicty of Kronecker operations on sparse matrices with applications to the solution of Markov models (SuDoc NAS 1.26:206274) by NASA, 1997
  13. Parallelization of the pipelined Thomas algorithm (SuDoc NAS 1.26:208736) by A. Povitsky, 1998
  14. A parallel pipelined renderer for the time-varying volume data (SuDoc NAS 1.26:206275) by Tzi-cker Chiueh, 1997

61. WPI 2005-2006 Undergraduate Catalog - Computer Science Course Descriptions
This course introduces the theoretical foundations of computer science. modern computer system components, pipelining of instruction sets,
http://www.wpi.edu/Pubs/Catalogs/Ugrad/Current/cscourses.html
2005-2006 Undergraduate Catalog
Computer Science Course Descriptions
CS 1101. INTRODUCTION TO PROGRAM DESIGN.
Cat. I
This course introduces principles of computation and programming with an emphasis on program design. Topics include design and implementation of programs that use a variety of data structures (such as records, lists, and trees), functions, conditionals, and recursion. Students will be expected to design, implement, and debug programs in a functional programming language. Intended audience: students desiring an introduction to programming and program design. Recommended background: none. Either CS 1101 or CS 1102 provide sufficient background for further courses in the CS department. Undergraduate credit may not be earned for both this course and CS 1102 . Undergraduate credit may not be earned both for this course and for CS 2135 CS 1102. ACCELERATED INTRODUCTION TO PROGRAM DESIGN.
Cat. I
This course provides an accelerated introduction to design and implementation of functional programs. The course presents the material from CS 1101 at a fast pace (so students can migrate their programming experience to functional languages), then covers several advanced topics in functional programming (potential topics include macros, lazy programming with streams, and programming with higher-order functions). Students will be expected to design, implement, and debug programs in a functional programming language. Intended audience: students starting with substantial previous programming background. Recommended background: prior programming background covering lists, trees, functions, and recursion. Undergraduate credit may not be earned for both this course and

62. Applied Computer Science - Distance Degree Program - Course Description
To provide a basic knowledge of instruction sets, elementary pipelining and Faculty of Maths, Physics and sciences Applied computer science
http://e-learning.sti.uniurb.it/acs/programs/contents.php?corso=comparch

63. Computer Science, Fall Term 1991 LS&A Course Guide
Not intended for computer science or computer engineering majors. Parallelcomputer Architecture. CS 470. (3). (Excl). pipelining and operation
http://www.lsa.umich.edu/saa/publications/courseguide/fall/archive/fall91.cg/com
Courses in Computer Science (Division 353)
181/EECS 181. Introduction to Computer Systems. Credit is granted for only one course among CS 181, Engin. 103, and Engin. 104. (4). (NS). Introduces students to computers. Focuses on software, hardware, and social impact of computers. Elementary programming concepts, software packages and applications, word processing, data communications, information management, input-output, data entry, computer hardware components and storage devices, microcomputers, and ethics in computing. Programming assignments using a personal computer. Term paper required. Cost:2 WL:1 183(283)/EECS 183. Elementary Programming Concepts. Not intended for CS or Computer Engineering concentrators. No credit granted to those who have completed or are enrolled in Engin. 103 or 104. (4). (NS). Introduction to a high level programming language, top-down analysis, and structured programming. Basic searching and sorting techniques. No previous experience in computer or programming is assumed. Students will write and debug several computer programs. Not intended for computer science or computer engineering majors. Cost:2 WL:1 216/EECS 216. Circuit Analysis.

64. Computer Science, Fall Term 1990 LS&A Course Guide
Foundations of computer science. CS 280, and either CS 303 or Math. Parallel computer Architecture. CS 470. (3). (Excl). pipelining and operation
http://www.lsa.umich.edu/saa/publications/courseguide/fall/archive/fall90.cg/Com
Courses in Computer Science (Division 353)
181/EECS 181. Introduction to Computer Systems. Credit is granted for only one course among CS 181, Engin. 103, and Engin. 104. (4). (NS). Introduces students to computers. Focuses on software, hardware, and social impact of computers. Elementary programming concepts, software packages and applications, word processing, data communications, information management, input-output, data entry, computer hardware components and storage devices, microcomputers, and ethics in computing. Programming assignments using a personal computer. Term paper required. [Cost:2] [WL:1] 216/EECS 216. Circuit Analysis. Prior or concurrent enrollment in Math. 216. (4). (Excl). Resistive circuit elements; mesh and node analysis, network theorems; network graphs and independence; energy storage elements; one- and two-time-constant circuits; phasors and a.c. steady-state analysis; complex frequency and network functions; frequency response and resonance. Lecture and laboratory. 270/EECS 270. Introduction to Logic Design.

65. Rice Course Schedule, Spring 2000: Computer Science (COMP)
pipelining, I/O devices, and interrupts and concurrency. 001 TBA TBATBA *CURRENT ENR 0 COMP 409 LOGIC IN computer science Credits 3.00 Spring 2000
http://www.rice.edu/projects/courses/2000spring/COMP.html
Rice Course Schedule, Spring 2000
Computer Science (COMP)
Rice Course Schedule as of 03/24/2000. This schedule is maintained by the Office of the Registrar ( reg@rice.edu Additional information about Rice courses is available on the Rice Academic Information page.
See also: Building Codes Registration Information NOTE: Course web pages are available for some COMP courses. * DISTRIBUTION COURSE: GROUP III Introduction to computer organization, operating systems, programming languages, artificial intelligence, and programming. Not intended for science-engineering students. May not be taken for credit after any other programming course. 001 T 07:00PM-10:00PM DH*1064 Sachs, Eric *CURRENT ENR: COMP 200 ELEMENTS OF COMPUTER SCIENCE Credits 3.00 Spring 2000 * DISTRIBUTION COURSE: GROUP III A broad introduction to the major topics of computer science, including algorithms, mathematical models of computation, machine organization and design, programming languages, communication, and artificial intelligence. 001 MWF 11:00AM-11:50AM DH*1075 Barland, Ian *CURRENT ENR: COMP 210 INTRO PRINCIPLES SCI.COMPUTING Credits 4.00 Spring 2000

66. Research Publications
Available in SpringerVerlag Lecture Notes in computer science Series. HICSS 96, Improving Software pipelining with Unroll-and-Jam , S. Carr,
http://www.cs.rochester.edu/~cding/publications.html
Research Publications
Conference Papers
ICS'05 Lightweight Reference Affinity Analysis ", Xipeng Shen, Yaoqing Gao, Chen Ding and Roch Archambault, in Proceedings of The 19th ACM International Conference on Supercomputing , Cambridge, Massachusetts, June 2005. SC'04 The Potential of Computation Regrouping for Improving Locality ", Chen Ding and Maks Orlovich, in Proceedings of SC2004 High Performance Computing, Networking, and Storage Conference , Pittsburgh, PA, November 2004. ASPLOS'04 Locality Phase Prediction ", Xipeng Shen, Yutao Zhong, and Chen Ding, in Proceedings of Eleventh International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS XI) , Boston, MA, October 2004. PACT'04 " The Energy Impact of Aggressive Loop Fusion ", YongKang Zhu, Grigorios Magklis, Michael L. Scott, Chen Ding, and David H. Albonesi, in Proceedings of International Conference on Parallel Architecture and Compilation Techniques (PACT) , Antibes Juan-les-pins, France, October 2004. ICPP'04 "

67. Gelato :: Participants
He received BS and PhD degrees in computer science from Tsinghua However,software pipelining brings costs, such as increased register pressure and
http://www.gelato.org/participants/member.php?id=tsinghua

68. Publications
A Realistic ResourceConstrained Software pipelining Algorithm. Available asUC Berkeley computer science Technical Report UCB//CSD-96-917.
http://theory.stanford.edu/~aiken/publications/publications.html
Publications
Book Articles
  • A Realistic Resource-Constrained Software Pipelining Algorithm. A. Aiken and A. Nicolau. In D. Gelernter et al., editors, Advances in Languages and Compilers for Parallel Processing , pages 274-290, MIT Press, Cambridge, Massachusetts, 1991. Fine-Grain Parallelization and the Wavefront Method. A. Aiken and A. Nicolau. In D. Gelernter et al., editors, Languages and Compilers for Parallel Computing , pages 1-16, MIT Press, Cambridge, Massachusetts, 1990.
  • Refereed Journal Articles
  • Flow-Insensitive Type Qualifiers. J. Foster, J. Kodumal, R. Johnson, and A. Aiken. Transactions on Programming Languages and Systems , to appear. A Direct Manipulation Environment for Programming Semantic Zoom Visualizations of Tabular Data . A. Woodruff, C. Olston, A. Aiken, M. Chu, V. Ercegovac, M. Lin, M. Spalding, and M. Stonebraker, Journal of Visual Languages and Computing Detecting Races in Relay Ladder Logic Programs . Z. Su, A. Aiken, and M. Fähndrich. Software Tools for Technology Transfer, Introduction to Set Constraint-Based Program Analysis.
  • 69. WCU - Computer Science - Masters Program Courses
    The course undertakes a detailed study of pipelining and the use of CSC 581 –Topics in computer science. Prerequisite To be determined by the topic
    http://www.cs.wcupa.edu/grad/grad_descriptions.html
    Graduate
    Program Computer
    Science Home
    Faculty Apply Now ... Graduate Page
    Master's Degree Program Course Descriptions
    Prerequisite: Acceptance into graduate program. Description: This course offers an advanced treatment of many of the theoretical areas underlying other Computer Science subjects.
  • Automata and Language Theory.
  • Regular grammars and languages.
  • Deterministic and non-deterministic finite automata.
  • Context-free grammars and languages.
  • Push-down automata.
  • Theory of Computability.
  • Models of computation.
  • Church's thesis.
  • Computability, Decidability.
  • Unsolvable problems, Halting Problem.
  • The existence of non-computable functions.
  • Propositional and Predicate Calculus.
  • Syntax and Semantics.
  • Validity and Satisfiability.
  • Resolution Theorem Proving.
    Prerequisite: Acceptance into graduate program. Description: This course covers the basic features of operating systems. Examples will be drawn from UNIX and other operating systems. This course includes an intensive study of the UNIX operating system by way of the UNIX kernel commands and utilities. Examples of laboratory projects are the following: thread programming, low-level UNIX programming in C, shell programming, interprocess communication. Topics:
  • Hardware atomic primitives, semaphores, monitors.
  • 70. Tera Computer - Design Goals Of The Tera Computer -Free Computer Science Tutoria
    Free tutorials and computer science help. The MPipeline is for memory-accessoperations, the A-pipeline is for arithmetic operations,
    http://www.laynetworks.com/Tera Computer.htm
    Web laynetworks.com CS 01 CS 02 CS 03 CS 04 ... CS 17
    TMA - Jan 2001 Q-1:- Answer the following questions on the development of the Tera Computer. What are the design goals of the Tera Computer? Ans:-1. The Tera is very much a HEP descendant but is implemented with modern VLSI circuits and packaging technology. A 400-MHz clock is proposed for use in the Tera system, again with a maximum of 128 threads per processor. The Tera architecture features include not only the high degree of multithreading but also the explicit-dependence lookahead and the high degree of super pipelining in its processor-network-memory operations. These advanced features are mutually supportive. The first Tera machines are expected to appear in late 1993.

    71. BGSU Computer Science: CS 607
    computer science Logo BGSU computer science Graduate Program Principles ofPipelined computers; Evaluating performance of pipelined computers
    http://www.bgsu.edu/departments/compsci/courses/607.html
    BGSU Computer Science Graduate Program
    CS 607: Architecture of Computers
    Syllabus
  • Introduction to Technology and Architecture(*)
  • Impact of technology on computer architecture Evolution of computer architecture Associative Memory (CAM)
  • Hardware concepts of CAM Cache Memory(*)
  • Basic cache structure Set associative caches Evaluating Cache performances Determining Cache parameters Replacement Policies Implementing LRU replacement policies Detail example of a cache memory system Virtual Memory(*)
  • Basic virtual memory structure Translation lookaside buffer Segment tables Replacement algorithms Detail example of a virtual memory system Pipeline Techniques(*)
  • Principles of Pipelined computers Evaluating performance of pipelined computers Reservation tables and collision vectors Maximizing pipeline performance Conditional branches in pipelined computers Internal forwarding and deferred instructions Reconfigurable computer architectures
  • Reconfigurable busses Addition in time O(1) Multiprocessors
  • Flynns classification of multiprocessors Vector computers(*)
  • Numerical algorithms on a vector computer Pipelining in vector computers Examples of vector computers, e.g. Cray
  • 72. SETI @ UNC Computer Science
    Our group is composed of several people from the computer science department An example of a long, noncomputer pipeline is an automobile assembly line.
    http://www.cs.unc.edu/~nyland/setiatunc.html
    SETI @ UNC Computer Science
    Welcome to our page about how we contribute to the SETI@Home project. We're not running it at home- we're running it on a machine in the Computer Science Department at UNC that has spare cycles (mostly at night). On this page, we explain what the hardware is, how we run it all automatically to favor anyone else who has anything to do (even run a runaway emacs processes), who we are, why our average time to finish a work unit is lower than average, and some musings on the accumulated stats at the SETI@Home site.
    Hardware
    Our primary hardware is an SGI Onyx2 (aka an Origin2000 with graphics accelerators). It has 32 processors, each of which is a MIPS R12000 processor running at 300 mHz (read below for reasons why a 300, or even 180, mHz processor can outperform a 500 mHz PentiumIII). We run the Irix6.2 binary compiled with the mips3 instruction set. For a little while, we ran the Irix6.4-mips4 binary, which ran more than twice as fast, but produced unusable results. We also contribute to SETI@Home with several other machines- a few Sun sparcs, a macintosh, a few PCs, and some HP workstations. Not one of these is nearly as fast as a single processor on the Oynx2, so the contributions do not even add up to 5% of our total contribution.

    73. 3BA5 - Computer Engineering
    Time Table BA (Mod) computer science, Junior Sophister 20032004 Tutorial -Project 1 - VHDL Pipeline Design - Part A, Wednesday 19th November 2003
    http://www.cs.tcd.ie/Michael.Manzke/3ba5.html

    74. Papers Accepted
    8765723448, Dynamic Thread Management in Kernel Pipeline Web Server Jalal Kawash,Department of computer science, The University of Calgary, Canada
    http://grid.hust.edu.cn/npc05/accepted2005.htm

    75. MIT OpenCourseWare | Electrical Engineering And Computer Science | 6.004 Computa
    MIT OpenCourseWare » Electrical Engineering and computer science » ComputationStructures, Pipeline a combinational circuit for improved throughput.
    http://ocw.mit.edu/OcwWeb/Electrical-Engineering-and-Computer-Science/6-004Compu
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    • Course Home Syllabus Calendar ... Computation Structures, Fall 2002
      Syllabus
      This section provides information on the course's objectives, expected learning outcomes, format, and policies. Course Description
      6.004 offers an introduction to the engineering of digital systems. Starting with MOS transistors, the course develops a series of building blocks - logic gates, combinational and sequential circuits, finite-state machines, computers and finally complete systems. Both hardware and software mechanisms are explored through a series of design examples. 6.004 is required material for any EECS undergraduate who wants to understand (and ultimately design) digital systems. A good grasp of the material is essential for later courses in digital design, computer architecture and systems. Before taking 6.004, students should feel comfortable using computers; a rudimentary knowledge of programming language concepts (6.001) and electrical fundamentals (6.002) is assumed. The problem sets and lab exercises are intended to give students "hands-on" experience in designing digital systems; each student completes a gate-level design for a RISC processor during the semester. Access to workstations as well as help from the course staff is provided in the lab but it is possible to complete the assignments using Athena machines or one's home computer. Students are encouraged to get help from others in understanding the material, but the designs and measurements they hand in must be their own work.

    76. BRUCE R. CHILDERS
    Teaching assistant (Spring 1992), CS210 Introduction to computer science, Rapid Prototyping of Counterflow Pipelines , UVA computer science Technical
    http://www.cs.virginia.edu/~brc2m/jobsearch/Resume.html
    BRUCE R. CHILDERS
    P.O. Box 3033 Department of Computer Science Oakton, Virginia 22124 Thornton Hall, University of Virginia Voice: (301) 589-7042, Fax: (804) 982-2214 Charlottesville, Virginia 22903 E-mail: brc2m@cs.virginia.edu Web: www.cs.virginia.edu/~brc2m OBJECTIVE Tenure-track assistant professor with a speciality in compilers/computer architecture. PROFESSIONAL INTERESTS Compilers and software development tools, computer architecture, application-specific and reconfigurable processors, electronic design automation, processor and system simulation, and embedded and portable computer systems. EDUCATION Ph.D. (Sept. 1991-present), Computer Science, University of Virginia , Charlottesville, Virginia. Thesis title: "Custom pipelines for embedded applications." Advisor: Prof. Jack W. Davidson. Expected Spring 1999. B.S. (May 1991), Computer Science, College of William and Mary , Williamsburg, Virginia. Graduated cum laude. Honors advisor: Prof. Phil Kearns. RESEARCH EXPERIENCE Research assistant (May 1992-present), University of Virginia, Computer Science Department; Supervisor: Prof. Jack W. Davidson.

    77. Citations Published As Springer Verlag Lecture Notes In Computer
    Message Dispatch On Pipelined Processors. Published as Springer Verlag LectureNotes in computer science 952, Springer Verlag, Berlin, 1995.
    http://citeseer.ist.psu.edu/context/1184683/0

    78. Computer Engineering And Computer Science: Subject Guide: Drexel University Libr
    Networked computer science and Technical Reference Library (NCSTRL) The microarchitecture of pipelined and superscalar computers QA76.9.
    http://www.library.drexel.edu/resources/guides/compeng.html
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    79. Computer Architecture Research Page
    Report A1993-1, Department of computer science, University of Joensuu, Joensuu, Pipeline Architecture, Report A-1995-3, Department of computer science,
    http://www.vtt.fi/ele/people/martti.forsell/work.html
    Research of Computer Architectures and Parallel Computing
    Responsible
    Contact Info

    Research Groups

    Introduction
    ...
    Links
    Responsible
    Martti Forsell , PhD
    1. Senior Research Scientist, VTT Electronics , Oulu, Finland
    2. Docent (Adjuct Professor), Laboratory of Computer Engineering Department of Electrical and Information Engineering University of Oulu , Oulu, Finland
    Contact Info
    Personal mail: Martti.Forsell (at) VTT.Fi
    Reserach Groups
    Computing Platforms Group ( Oulu
    Past activities:
    - Network on Chip Group (Oulu - Stockholm
    - Parallel Computing Group ( Kuopio
    Introduction
    The performance of computers has increased exponentially during last decades. This has been a result of major progress in the areas of VLSI technology and processor architectures. Now certain physical reasons like the speed of light, the size of moleculs, increased resistance of wires, leakage current and overall complexity of computer systems are beginning to slow down this development. However, the use of parallelism either within a processor (instruction level parallelism, ILP) or between multiple processors in a single computer (thread level parallelism, TLP) provides possibilities to increase the performance of computers even if the physical reasons will prevent manufacturing (smaller and) faster processors. The new architectures and models like VLIW, MTA, CM, SM and PRAM play important role fulfilling these promises. The first goal of this research are to invent efficient processor, memory system and communication architectures for parallel (and sequential) computers by organizing the computational elements efficiently, optimizing the internal and external communication between operational units, and by combining ILP and TLP techniques. The second goal is to invent application development and performance evaluation methodologies for these architectures including parallel programming languages, compilers, optimizers, simulators, and analytical performance, area and power consumption models.

    80. Towards Efficient Fine-grain Software Pipelining
    Dataflow software pipelining A case study. ACAPS Design Note 06, School ofComputer science, McGill University, Montreal, Que., Feb. 1989.
    http://portal.acm.org/citation.cfm?id=255129.255177

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